Home » PEOPLE » » Dr. Srivastava’s CV

Dr. Srivastava’s CV

DOWNLOAD PDF HERE

Ankur Srivastava

Professor and ECE Associate Chair for Graduate Affairs
A. James Clark School of Engineering
Electrical & Computer Engineering and Institute for Systems Research 2317 A.V. Williams Building
University of Maryland College Park, MD 20742 ankurs@umd.edu

PERSONAL INFORMATION

Educational Background

  • 2002, Ph.D., Computer Science, University of California, Los Angeles,Winner: Outstanding PhD Dissertation Award, Computer Science Dept. UCLA 2002
  • 2000, M.S., Electrical and Computer Engineering, Northwestern University
  • 1998, Bachelor of Technology, Electrical Engineering, Indian Institute of Technology-Delhi

    Academic Appointments at UMD

  • 2014, Full Professor, Department of ECE, July 2014-Present
  • 2009-2014, Associate Professor, Department of ECE
  • 2008, Joint Appointment Institute for Systems Research, ISR, 2008-Present
  • 2002-2009, Assistant Professor, Department of ECE
  • Affiliate Appointment: MC2 Center

    Administrative Appointments at UMD

  • September 2013-Ongoing, Associate Chair for Graduate Affairs

    Other Employment

  • 2001-2002, Graduate Research Assistant, Computer Science Department UCLA
  • 1998-2000, Graduate Research Assistant, ECE Department, Northwestern University CONTRIBUTIONS AS ECE ASSOCIATE CHAIR FOR GRADUATE AFFAIRS Contributions to ECE
  • Managing the fellowship and TA allocations.
  • Increasing the representation of domestic students in the PhD program.
  • Strengthening the MS program.
  • Starting new courses on embedded systems at graduate and undergraduate levels including course material development and instructor recruitment.
  • Revamping the fellowship models to enable multi-year funding guarantees.
  • New approaches for mentoring graduate students.
  • Community building through various student-faculty events.
  • Enabling development of new advanced graduate courses.
  • Working with ECE external relations for supporting fund raising with donors.
  • Helping put together an application fee waiver program.
  • Outreach with ECE industry partners, alumni and visitors.
  • Innovative techniques for outreach with potential student recruits and student applicants.
    • Organized an on-campus/online recruitment in spring 2016 event for attracting top applicants to join UMD. Event witnessed tremendous success in successfully encouraging the attendees to accept the UMD offer.
    • Organized a more ambition on-campus/online recruitment event in fall 2016 targeting “potential” applicants (with the objective of reversing falling graduate applicant numbers). 175 potential applicants mostly from top schools registered for the event.

    Contributions to ENTS

  • Community building.
  • Helping with curricular enhancements.
  • Enhancing ENTS with certification programs in four new areas leading to substantial improvement in program quality. (in process of gaining university approval).

    RESEARCH, SCHOLARLY AND CREATIVE ACTIVITIES

    Books

    1. S. Sapatnekar, A. Srivastava, Y. Zhang and B. Shi, “Thermally-Informed Design of Microelectronic Components”, Encyclopedia of Thermal Packaging, World Scientific Publishers, 2014

    Book Chapters

    1. Tiantao Lu and Ankur Srivastava, “Detailed Electrical and Reliability Study of Tapered TSVs”, Physical Design for 3D Integrated Circuits/Edited By Aida Todri-Sanial, Chuan Seng Tan, CRC Press 2015
    2. Caleb Serafy , Ankur Srivastava, “Leakage Power: Physical Mechanisms and Possible Solutions” Electronics Cooling , December 2014 (Magazine)
    3. Bing Shi and Ankur Srivastava, Dynamic Thermal Management Considering Accurate Temperature-Leakage Interdependency”, Cooling of Microelectronic and Nanoelectronic Equipment, WSPC Series in Advanced Integration and Packaging, 2014
    4. Bing Shi and Ankur Srivastava, “Micro-Fluidic Cooling for Stacked 3D-ICs: Fundamentals, Modeling and Design”, Advances in Computers / Edited by Ali Hurson, Vol. 88, Elsevier, 2013
    5. Bing Sh and Ankur Srivastava, “Thermal and Power-Aware Task Scheduling and Data Placement for Storage Centric Datacenters”, Handbook of Energy-Aware and Green Computing / Edited by Sanjay Ranka and Ishfaq Ahmad, Vol. 1, CRC Press, 2012
    6. R. Gopalan, W. Schwartz, R. Chellappa, and A. Srivastava. “Face detection”, A Guide to Visual Analysis of Humans: Looking at People, T. Moeslund et al (Eds), Springer 2011
    7. V. Khandelwal and A. Srivastava, “Basic Algorithmic Techniques “, C. Alpert, D. Mehta and S. Sapatnekar Edited Handbook of Algorithms for Physical Design Automation, CRC Press 2009
    8. A. Srivastava, J. Sobaje, M. Potkonjak and M. Sarrafzadeh, “Optimal Node Scheduling for Effective Energy Usage in Sensor Networks“, System level Power Optimization for Wireless Multimedia Communication, Kulwer Academic Publishers, 2002

    Articles in Refereed Journals

    1. Yang Xie, Chongxi Bao and Ankur Srivastava, “Security-Aware 2.5D IC Design Flow Against Hardware IP Piracy”, IEEE Computer, To Appear 2017
    2. Tiantao Lu, and Ankur Srivastava, “Low-Power Clock Tree Synthesis for 3D-ICs”, To Appear, ACM Transactions on Design Automation of Electronic Systems (TODAES). 2017
    3. C. Serafy, Z. Yang , A. Srivastava, Y. Hu and Y. Joshi, “Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks”, IEEE Design & Test, vol. 33, no. 2, pp. 40-48, April 2016
    4. C. Serafy, A. Bar-Cohen, A. Srivastava and D. Yeung, “Unlocking the True Potential of 3-D CPUs With Microfluidic Cooling,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 4, pp. 1515-1523, April 2016
    5. Y. Xie, C. Bao, C. Serafy, T. Lu, A. Srivastava and M. Tehranipoor, “Security and Vulnerability Implications of 3D ICs,” IEEE Transactions on Multi-Scale Computing Systems, vol. 2, no. 2, pp. 108-122, April-June 1 2016
    6. Bao, Chongxi, Domenic Forte, and Ankur Srivastava. “On Reverse Engineering-Based Hardware Trojan Detection”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 1, pp. 49-57, Jan. 2016.
    7. T. Lu and A. Srivastava, “Modeling and Layout Optimization for Tapered TSVs,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 12, pp. 3129-3132, Dec. 2015.
    8. Bao, Chongxi, Domenic Forte, and Ankur Srivastava. “Temperature Tracking: Toward Robust Run-Time Detection of Hardware Trojans”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 10, pp. 1577-1585, Oct. 2015.
    9. C. Serafy and A. Srivastava, “TSV Replacement and Shield Insertion for TSV–TSV Coupling Reduction in 3-D Global Placement,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 4, pp. 554-562, April 2015.
    10. Caleb Serafy, Bing Shi, Ankur Srivastava, “A Geometric Approach to Chip-Scale TSV Shield Placement for the Reduction of TSV Coupling in 3D-ICs”, Elsevier Integration, the VLSI Journal: VLSI for the New Era, Volume 47 Issue 3, June 2014
    11. Yufu Zhang, Bing Shi and Ankur Srivastava, “A Statistical Framework for Designing On-chip Thermal Sensing Infrastructure in Nano-scale Systems”, IEEE Transactions on Very Large Scale Integration Systems. Vol. 22, No. 2, February2014
    12. INVITED: Avram Bar-Cohen, Ankur Srivastava and Bing Shi, “Thermo-Electrical Co-Design of 3D ICs: Challenges and Opportunities”, Computational Thermal Sciences, Begell House Publishers, Vol5, Issue 6, 2013
    13. Bing Shi and Ankur Srivastava, “Optimized Micro-Channel Design for Stacked 3D ICs”, IEEE Transactions on Computer Aided Design 33(1):90-100 · December 2013
    14. Domenic Forte and Ankur Srivastava, “Improving the Quality of Delay-based PUFs via Optical Proximity Correction”, IEEE Transactions on Computer Aided Design (TCAD), Vol. 32, No. 12, December2013
    15. Bing Shi, Ankur Srivastava and Avram Bar-Cohen, “Co-design of Micro-fluidic Heat Sink and Thermal TSV for Cooling of 3D-IC”, IET Circuits, Devices & Systems Journal, Volume 7, Issue 5, September 2013
    16. Bing Shi, Yufu Zhang and Ankur Srivastava,”Dynamic Thermal Management Under Soft Thermal Constraints”, IEEE Transactions on VLSI., Vol. 21, No. 11, November 2013
    17. Domenic Forte, Ankur Srivastava, “Resource-Aware Architectures for Adaptive Particle Filter Based Visual Target Tracking”, ACM Transactions on Design Automation of Electronic Systems, Volume 18 Issue 2, March 2013.
    18. Domenic Forte, Ankur Srivastava, “Energy and Thermal-Aware Video Coding via Encoder/Decoder Workload Balancing”, ACM Transactions on Embedded Computing Systems, Volume 12 Issue 2s, May 2013.
    19. Domenic Forte, Ankur Srivastava, “Thermal-Aware Sensor Scheduling for Distributed Estimation”, ACM Transactions on Sensor Networks, Vol. 9, No. 4, Nov. 2013.
    20. Bing Shi, Yufu Zhang and Ankur Srivastava, “Accelerating Gate Sizing Using Graphics Processing Units”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 31, No 1, pp. 160-164, Jan. 2012.
    21. Bing Shi and Ankur Srivastava, “Unified Datacenter Power Management Considering On-Chip and Air Temperature Constraints”, Elsevier Sustainable Computing: Informatics and Systems journal. Vol. 1, No. 2, pp. 91-98, Jun. 2011.
    22. Yufu Zhang, Ankur Srivastava, “Accurate Temperature Estimation Using Noisy Thermal Sensors for Gaussian and Non-Gaussian Cases“, IEEE Transactions on Very Large Scale Integration Systems, Vol.19 , No.9 , pp. 1617-1626, Sept. 2011.
    23. Yufu Zhang, Ankur Srivastava and Mohamed Zahran, “On-Chip Sensor Driven Efficient Thermal Profile Estimation Algorithms”, ACM Transactions on Design Automation of Electronic Systems, Vol. 15, No. 3, May 2010.
    24. A. Davoodi and A. Srivastava, “Variability-Driven Gate Sizing for Binning Yield Optimization”, IEEE Transactions on VLSI Systems, Vol. 16, No 6, pp. 683-692, June 2008.
    25. A. Sankaranarayanan, A. Srivastava and R. Chellappa “Algorithmic and Architectural Optimizations for Computationally Efficient Particle Filtering”, IEEE Transactions on Image Processing, Vol. 17, No. 5, pp. 737-748, May 2008.
    26. V. Khandelwal and A. Srivastava, “Variability-Driven Formulation for Simultaneous Gate Sizing and Post-Silicon Tunability Allocation,” IEEE Transactions on Computer Aided Design, Vol. 27, No. 4, pp. 610-620, April 2008.
    27. M. Peckerar, D. Sander, A. Srivastava, A. Foli and U. Vishkin, “Electron Beam and Optical Proximity Effect Reduction for Nanolithography: New Results”, Journal on Vacuum Science and Technology B, Vol. 25, No. 6, 2007.
    28. V. Khandelwal and A. Srivastava, “Active Mode Leakage Reduction Using Fine-Grained Forward Body Biasing Strategy”, Elsevier Integration the VLSI Journal, Vol. 40, No. 4, pp. 561- 570, July 2007.
    29. V. Khandelwal and A. Srivastava, “Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors”, IEEE Transactions on Computer Aided Design, Vol. 26, No. 7, pp. 1246- 1255, July 2007.
    30. V. Khandelwal and A. Srivastava, “A Quadratic Modeling-Based Framework for Accurate Statistical Timing Analysis Considering Correlation”, IEEE Transactions on VLSI Systems, Vol. 15, No. 2, pp. 206-215, February 2007.
    31. A. Davoodi, V. Khandelwal, A. Srivastava, “Probabilistic Evaluation of Solutions in Variability- Driven Optimization”, IEEE Transactions on Computer Aided Design, Vol. 25, No 12, pp. 3010- 3016, December 2006
    32. J. L. Wong, A. Davoodi, V. Khandelwal, A. Srivastava, M. Potkonjak, “A Statistical Methodology for Wire-length Prediction”, IEEE Transactions on Computer Aided Design, Vol. 25, No. 7, pp. 1327-1336, July 2006
    33. A. Davoodi, A. Srivastava, “Effective Techniques for the Generalized Low Power Binding Problem”, ACM Transactions on Design Automation of Electronic Systems, Vol. 11, No. 1, pp. 52-69, January 2006.
    34. A. Davoodi and A. Srivastava, “Power-Driven Simultaneous Resource Binding and Floorplanning: A Probabilistic Approach”, IEEE Transactions on VLSI Systems, Vol. 13, No. 8, pp. 934-942, August 2005.
    35. V. Khandelwal, A. Davoodi, A. Srivastava, “Simultaneous Vt Selection and Assignment for Leakage Optimization”, IEEE Transactions on VLSI Systems, Vol. 13, No. 6, pp. 762-765, June 2005.
    36. A. Davoodi and A. Srivastava: “Voltage Scheduling Under Uncertainties: A Risk Management Perspective”, ACM Transactions on Design Automation of Electronic Systems, Vol. 10, No. 2, pp.354-368, April 2005.
    37. A. Srivastava, S. Ogrenci Memik, B. Kyung Choi and M. Sarrafzadeh, “On Effective Slack Management in the Post Scheduling Phase”, IEEE Transactions on Computer Aided Design, Vol. 24, No. 4, pp. 645-653, April 2005.
    38. A. Davoodi, V. Khandelwal and A. Srivastava, “Empirical Model for Net Length Probability Distribution and Applications”, IEEE Transactions on VLSI Systems, Vol. 12, No. 10, pp. 1066- 1075, October 2004.
    39. A. Srivastava, R. Kastner, C. Chen and ,M. Sarrafzadeh, “Timing Driven Gate Duplication”,

      IEEE Transactions on VLSI Systems, Vol. 12, No 1, pp. 42-51, January 2004.

    40. C. Chen, E. Bozorgzadeh, A. Srivastava and M. Sarrafzadeh, “Budget Management and its Applications”, ALGORITHMICA, Vol. 34, pages 261-275, 2002.
    41. A. Srivastava E. Kursun and M. Sarrafzadeh, “Predictability in RT-Level Designs”, Journal of Circuits, Systems and Computers, Special Issue on Low Power IC Designs, Vol 11 No; 4,; pp. 323 – 332, August 2002.
    42. S. Ghiasihafezi, A. Srivastava, X. Yang and M. Sarrafzadeh, “Optimal Energy Aware Clustering in Sensor Networks,” SENSORS Journal, Vol. 2, No. 7, pp. 258-269, July 2002.
    43. A. Srivastava, C. Chen and Majid Sarrafzadeh, “Timing Driven Gate Duplication in the Technology Independent Stage”, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, pp. 2673-2680, November 2001.
    44. C.Chen, A. Srivastava and M. Sarrafzadeh, “On Gate-Level Power Optimization Using Dual Supply Voltages”, IEEE Transactions on VLSI Systems, Vol. 9, No 5, pp. 616-629, October 2001.
    45. A. Srivastava, R. Kastner and M. Sarrafzadeh, “On the Complexity of Gate Duplication”, IEEE Transactions on Computer Aided Design, Vol. 20, No. 9, pp. 1170-1176, September. 2001.
    46. A.H. Farrahi, C. Chen, A. Srivastava, M. Sarrafzadeh and G. Tellez, “Activity Driven Clock Design”, IEEE Transactions on Computer Aided Design, Vol. 20, No. 6, pp. 705-714, June 2001.

    Published Conference Proceedings

    1. Yuntao Liu, Yang Xie, Chongxi Bao, Ankur Srivastava, “An Optimization-Theoretic Approach for Attacking Physical Unclonable Functions”, Proc. IEEE/ACM International Conference on Computer Aided Design (ICCAD), Nov. 2016
    2. Yang Xie, Ankur Srivastava, “Mitigating SAT Attack on Logic Locking”, Conference on Cryptographic Hardware and Embedded Systems (CHES), August, 2016.
    3. Tiantao Lu, Caleb Serafy, Zhiyuan Yang, and Ankur Srivastava. “Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs.”, Proceedings of the 2016 International Symposium on Low Power Electronics and Design (ISLPED). ACM, August 2016.
    4. T. Lu, Z. Yang and A. Srivastava, “Post-Placement Optimization for Thermal-Induced Mechanical Stress Reduction,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, PA, July 2016, pp. 158-163.
    5. Z. Yang and A. Srivastava. “Physical Co-Design for Micro-Fluidically Cooled 3D ICs,” IEEE Intersociety Conference on Thermal and Thermo-mechanical Phenomena in Electronic Systems (ITherm), May 2016.
    6. Z. Yang, C. Serafy and A. Srivastava. “ECO Based Placement and Routing Frame-work for 3D FPGAs with Micro-Fluidic Cooling,” IEEE Field-Programmable Custom Computing Machines (FCCM), May 2016.
    7. T. Lu, Z. Yang and A. Srivastava, “Electromigration-aware placement for 3D-ICs,” 17th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, 2016, pp. 35- 40.
    8. C. Serafy, T. Lu and A. Srivastava. “Thermal-Reliability Physical Co-Optimization During Architectural Design Space Exploration of 3D-CPUs.”, Proceedings of the Government Microcircuit Applications and Critical Technology Conference (GOMACTech). 2016.
    9. Zhiyuan Yang, Ankur Srivastava, “Physical Design of 3D FPGAs Embedded with Micro- channel-based Fluidic Cooling,” In Proceedings of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016, (pp. 54-63).
    10. Zhiyuan Yang, Ankur Srivastava, “Co-Placement for Pin-Fin Based Micro-Fluidically Cooled 3D ICs.” In ASME InterPACK, June 2015.
    11. T. Lu, and A. Srivastava, “Electromigration-aware Clock Tree Synthesis for TSV-based 3D-ICs”,

      in Proc. IEEE/ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2015

    12. T. Lu, and A. Srivastava, “Electrical-thermal-reliability Co-design for TSV-based 3D-ICS”, in Proc. ASME InterPACK, 2015.
    13. Bao, Chongxi, Yang Xie, and Ankur Srivastava. “A Security-Aware Design Scheme for Better Hardware Trojan Detection Sensitivity.” IEEE Hardware Oriented Security and Trust (HOST), 2015.
    14. Bao, Chongxi, and Ankur Srivastava. “3D Integration: New Opportunities in Defense Against Cache-Timing Side-Channel Attacks.” 33rd IEEE International Conference on Computer Design (ICCD), 2015.
    15. C. Serafy, A. Srivastava, A. Bar-Cohen and D. Yeung. “Design Space Exploration of 3D CPUs and Micro-Fluidic Heatsinks with Thermo-Electrical-Physical Co-Optimization.”, In Proceedings of the ASME International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, 2015
    16. Tiantao Lu and Ankur Srivastava, “Gated Low-power Clock Tree Synthesis for 3D-ICs”, International Symposium on Low Power Electronics and Design (ISLPED), page 319 – 322, August 2014.
    17. Caleb Serafy, Ankur Srivastava, Donald Yeung, “Unlocking the True Potential of 3D CPUs with Micro-Fluidic Cooling,” Proceedings of the IEEE International Symposium on Lower Power Electronics and Design (ISLPED), August 2014
    18. Caleb Serafy, Ankur Srivastava, Donald Yeung, “Continued Frequency Scaling in 3D ICs through Micro-Fluidic Cooling”, Proceedings of the IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), May 2014
    19. C. Bao, D. Forte and A. Srivastava, “On Application of One-class SVM to Reverse Engineering- Based Hardware Trojan Detection”, International Symposium on Quality of Electronic Design, (ISQED), 2014
    20. C. Serafy and A. Srivastava, “Coupling-Aware Force Driven Placement of TSVs and Shields in 3D-IC layouts”, ACM International Symposium on Physical Design, 2014
    21. C. Serafy and A. Srivastava, “Online TSV Health Monitoring and Built-in Self-Repair to Overcome Aging”, In Proceedings of the 15th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013(DFT}
    22. C. Serafy, B. Shi, A. Srivastava and D. Yeung, “High Performance 3D Stacked DRAM Processor Architectures with Micro-Fluidic Cooling”, In Proceedings of the IEEE 3D System Integration Conference 2013 (3DIC).
    23. T. Lu and A. Srivastava, “Detailed Electrical and Reliability Study on Tapered TSVs”, In Proceedings of the IEEE 3D System Integration Conference 2013 (3DIC).
    24. Domenic Forte, Chongxi Bao and Ankur Srivastava, “Temperature Tracking: An Innovative Run- Time Approach for Hardware Trojan Detection”, International Conference on Computer Aided Design (ICCAD), Nov. 2013.
    25. Caleb Serafy, Ankur Srivastava, “A Geometric Approach to TSV Shield Placement for the Reduction of TSV-TSV Coupling in 3D-ICs”, Great Lakes Symposium on VLSI (GLSVLSI), May, 2013.
    26. Bing Shi, Ankur Srivastava, “Co-optimization of TSV assignment and micro-channel placement for 3D-ICs”, Great Lakes Symposium on VLSI (GLSVLSI), May, 2013.
    27. Bing Shi, Ankur Srivastava, “Thermal Stress Aware 3D-IC Statistical Static Timing Analysis”,

      Great Lakes Symposium on VLSI (GLSVLSI), May, 2013.

    28. Bing Shi , Ankur Srivastava, Avram Bar-Cohen, “Hybrid 3D-IC Cooling System Using Micro- Fluidic Cooling and Thermal TSVs”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), August 2012 [Best Paper Award]
    29. Domenic Forte, Ankur Srivastava, “Manipulating Manufacturing Variations for Better Silicon- Based Physically Unclonable Functions”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), August 2012.
    30. Domenic Forte , Ankur Srivastava, “On Improving the Uniqueness of Silicon-Based Physically Unclonable Functions Via Optical Proximity Correction”, Design Automation Conference (DAC), June 2012. [DAC Best Paper Candidate]
    31. Bing Shi, Ankur Srivastava, “TSV-Constrained Micro-channel Infrastructure Design for Cooling Stacked 3D-ICs”, International Symposium on Physical Design (ISPD), April 2012.
    32. Domenic Forte, Ankur Srivastava, “Energy-Aware and Quality-Scalable Data Placement and Retrieval for Disks in Video Server Environments”, IEEE International Conference on Computer Design (ICCD), Oct. 2011.
    33. Domenic Forte, Ankur Srivastava, “Adaptable Architectures for Distributed Visual Target Tracking”, IEEE International Conference on Computer Design (ICCD), Oct. 2011.
    34. Bing Shi, Ankur Srivastava, “Cooling of 3D-IC Using Non-Uniform Micro-channels and Sensor Based Dynamic Thermal Management”, invited paper, Forty-Ninth Annual Allerton Conference on Communication, Control, and Computing, Sept. 2011.
    35. Domenic Forte , Ankur Srivastava, “Energy-Aware Video Storage and Retrieval in Server Environments”, International Green Computing Conference, (IGCC), July 2011;
    36. Domenic Forte , Ankur Srivastava, “Resource-Aware Architectures for Particle Filter Based Visual Target Tracking”, International Green Computing Conference, (IGCC), July 2011
    37. Bing Shi , Ankur Srivastava, “Non-Uniform Micro-Channel Design for Stacked 3D-ICs”,

      Proceedings of IEEE/ACM Design Automation Conference (DAC), June 2011

    38. Domenic Forte , Ankur Srivastava, “Adaptable Video Compression and Transmission using Lossy and Workload Balancing Techniques”, Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on, June 2011 [Winner Best Student Paper Award]
    39. Domenic Forte , Ankur Srivastava, “Energy-Aware Video Coding of Multiple Views via Workload Balancing”, Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on, June 2011
    40. Domenic Forte , Ankur Srivastava, “Energy and Thermal-Aware Video Coding via Encoder/Decoder Workload Balancing”, International Symposium on Low Power Electronics and Design 2010 (ISLPED), Aug. 2010;
    41. Bing Shi , Yufu Zhang, Ankur Srivastava, “Dynamic Thermal Management for Single and Multi- core Processors under Soft Thermal Constraints”, International Symposium on Low Power Electronics and Design 2010 (ISLPED), Aug. 2010
    42. Bing Shi , Ankur Srivastava, “Thermal and Power-Aware Task Scheduling for Hadoop Based Storage Centric Datacenters”, International Green Computing Conference (IGCC), Aug. 2010
    43. Yufu Zhang and Ankur Srivastava, “Adaptive and Autonomous Thermal Tracking for High Performance Computing Systems”, Proceedings of IEEE/ACM Design Automation Conference, (DAC) June 2010
    44. Domenic Forte , Ankur Srivastava, “Thermal-Aware Sensor Scheduling for Distributed Estimation”, International Conference on Distributed Computing in Sensor Systems 2010 (DCOSS), June 2010
    45. Y. Zhang, B. Shi and A. Srivastava, “A Statistical Framework for Designing On-Chip Thermal Sensing Infrastructure in Nano-Scale Systems”, Procs of ACM International Symposium on Physical Design (ISPD), March 2010
    46. Y. Zhang and A. Srivastava, “Accurate Temperature Estimation Using Noisy Thermal Sensors”,

      Proc. Design Automation Conference (DAC), July 2009

    47. Y. Zhang , A. Srivastava and M. Zahran, “Chip Level Thermal Profile Estimation Using On-chip Temperature Sensors” , Proceedings of IEEE International Conference on Computer Design (ICCD08), October 2008
    48. V. Khandelwal and A. Srivastava, “Monte Carlo Driven Stochastic Optimization Framework for Handling Fabrication Variability”, Proc. International Conference on Computer Aided Design (ICCAD07), November 2007
    49. J. Wong, A. Davoodi, V. Khandelwal, A. Srivastava and M. Potkonjak, “Statistical Timing Analysis Using Kernel Smoothing”, Proc. International Conference on Computer Design (ICCD07), October 2007
    50. V. Khandelwal and A. Srivastava, “Variability-Driven Formulation for Simultaneous Gate Sizing and Post-Silicon Tunability Allocation ”, Proc. International Symposium on Physical Design (ISPD07) April 2007. [WINNER BEST PAPER AWARD]
    51. A. Dobhal, V. Khandelwal and A. Srivastava, “Efficient and Accurate Statistical Timing Analysis for Non-linear, Non-Gaussian Variability with Incremental Attributes”, Proc International Conference on VLSI Design January 2007
    52. A. Dobhal, V. Khandelwal, A. Davoodi and A. Srivastava, “Variability Driven Joint Leakage, Delay Optimization With Provable Convergence“, Proc. International Conference on VLSI Design January 2007
    53. A. Davoodi and A. Srivastava, “Variability-Driven Gate Sizing for Binning Yield Optimization”, Proc. Design Automation Conference (DAC06) July 2006
    54. A. Davoodi and A. Srivastava, “Probabilistic Evaluation of Solutions in Variability-Driven Optimization”, Proc. International Symposium on Physical Design (ISPD’06) , April 2006
    55. A. Davoodi and A. Srivastava, “Variability-Driven Buffer Insertion Considering Correlations”, Proc. of International Conference on Computer Design (ICCD’05); October 2005;
    56. A. Sankaranarayanan, R. Chellappa and A. Srivastava, “Algorithmic and Architectural Design Methodology for Particle Filters in Hardware”, Proc. of International Conference on Computer Design (ICCD’05); October 2005;
    57. A. Davoodi and A. Srivastava, “Probabilistic Dual-Vth Leakage Optimization Under Variability

      ”, International Symposium on Low Power Electronics and Design; (ISLPED’05) August 2005

    58. V.; Khandelwal and A. Srivastava, “A General Framework for Accurate Statistical Timing Analysis Considering Correlations”, Proc. Design Automation Conference, (DAC’05) June 2005
    59. L. Yuan, G Qu and A. Srivastava, “VLSICAD Tool Protection by Birthmarking Design Solutions

      ”, Proc. Great Lakes Symposium on VLSI (GLSVLSI’05) April 2005

    60. A. Davoodi and A. Srivastava, “Wake-up Protocols for Controlling Current Surges in MTCMOS- based Technology”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’05),; January 2005
    61. A. Davoodi and A. Srivastava, “Simultaneous Floorplanning and Binding: A Probabilistic Approach”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’05),; January 2005;
    62. V. Khandelwal, A. Davoodi and A. Srivastava, “Efficient Statistical Timing Analysis through Error Budgeting”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
    63. V. Khandelwal and A. Srivastava, “Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
    64. J. Wong, A. Davoodi, V. Khandelwal, A. Srivastava and M. Potkonjak, “Wire-length Prediction using Statistical Techniques”,; Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
    65. A. Davoodi, V. Khandelwal and A. Srivastava, “Variability Inspired Implementation Selection Problem”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
    66. V. Khandelwal and A. Srivastava, “Active Mode Leakage Reduction Using Fine-Grained Forward Body Biasing Strategy “, Proc.International Symposium on Low Power Electronics and Design (ISLPED’04) August 2004.
    67. A. Davoodi, V. Khandelwal and A. Srivastava, “High Level Techniques for Power-Grid Noise Immunity “, Proc. Great Lakes Symposium on VLSI (GLSVLSI’04) , April 2004
    68. A. Srivastava et al: “Achieving Design Closure Through Delay Relaxation Parameter”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’03), November 2003
    69. V. Khandelwal, A. Davoodi, A. Nanavati and A. Srivastava, “A Probabilistic Approach to Buffer Insertion Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’03), November 2003 [BEST PAPER AWARD NOMINEE].
    70. A. Davoodi and A. Srivastava, “Effective Graph Theoretic techniques for the Generalized Low Power Binding Problem”, Proc. International Symposium on Low Power Design (ISLPED’03) August 2003
    71. A. Davoodi and A. Srivastava, “Voltage Scheduling Under Uncertainties: A Risk Management Perspective”, ;Proc. International Symposium on Low Power Design (ISLPED’03) August 2003
    72. A. Srivastava, “Simultaneous Vt Selection and Assignment for Leakage Optimization”, Proc. International Symposium on Low Power Design (ISLPED’03) August 2003
    73. A. Srivastava and M. Sarrafzadeh, “Predictability: Definition Analysis and Optimization”, Proc. International Conference on Computer Aided Design (ICCAD’02) November. 2002
    74. E. Kursun, A. Srivastava, S. Ogrenci Memik and M. Sarrafzadeh, “Early Evaluation techniques for Low Power Binding”, Proc. International Symposium on Low Power Design; (ISLPED’02) August. 2002
    75. S. Ogrenci-Memik, A. Srivastava and M. Sarrafzadeh, “Algorithmic Aspects of Uncertainty Driven Scheduling”, Proc. IEEE International Symposium on Circuits and Systems (ISCAS’02) May. 2002
    76. M. Sarrafzadeh, E. Bozorgzadeh, R. Kastner and A. Srivastava, “Design and Analysis of Physical Design Algorithms“, Proc. International Symposium on Physical Design (ISPD’01) April 2001
    77. A. Ranjan, A. Srivastava and M. Sarrafzadeh, “Layout Aware Retiming“, Proc. Great Lakes Symposium on VLSI (GLSVLSI’01), March 2001.
    78. R. Murgai, S. Chakraborthy, R. Carragher, M. Prasad, A. Srivastava, N. Vemuri and H. Yoshidd, “Layout Driven Logic Optimization”,, Proc. Design Automation and Test in Europe (DATE’01) February 2001.
    79. A. Srivastava, C. Chen and M. Sarrafzadeh, “Timing Driven Gate Duplication in the Technology Independent Stage“, Proc. Asia and South Pacific Design Automation Conference, (ASPDAC’01) January 2001
    80. A.Srivastava, R. Kastner and M. Sarrafzadeh, “Timing Driven Gate Duplication: Complexity Issues and Algorithms“, Proc. International Conference on Computer Aided Design (ICCAD’00) November. 2000

    Invited Talks

  • 2016, Logic Obfuscation, Microprocessor Test and Verification Conference
  • 2016, Hardware Security, Northrop Grumman
  • 2016, Microfluidic Thermal Management and Thermo-Electronic Co-Design for Chip Stacks, ECTC Tutorial
  • 2015, Electro-Thermo-Mechanical Co-Design of Fluidically Cooled Integrated Circuits, DARPA Modeling Workshop
  • 2015, Power Performance and Reliability Codesign, MODSIM Workshop
  • 2015, Power Performance and Reliability Codesign for 3D ICs, HMC Workshop
  • 2014, Microfluidic Thermal Management and Thermo-Electronic Co-Design for Chip Stacks, ECTC-ITherm, Tutorial (with Avi Bar-Cohen)
  • 2014, Electro-Thermo-Mechanical Co-Design of Fluidically Cooled Integrated Circuits, MODSIM Workshop
  • 2013, Electrical Micro-fluidic Co-Design, DARPA Kickoff Meeting
  • 2013, Energy and Thermal Optimization in Complex Computer Systems, Indian Institute of Science
  • 2013, Electro-Thermo-Mechanical Co-Design of Fluidically Cooled Integrated Circuits, DARPA Industry Day Poster
  • 2013, Microfluidic Thermal Management and Thermo-Electronic Co-Design for Chip Stacks, SemiTherm, Evening Tutorial (with Avram Bar-Cohen)
  • 2012, Hardware Security, LTS Colloquium
  • 2012, Hardware Security, ECE Invited Talk to L3 Communications
  • 2010, On-Chip Thermal Sensing, ECE Colloquium, University of Illinois Urbana Champagne
  • 2010, On-Chip Thermal Sensing, EECS, University of Michigan Ann Arbor
  • 2010, Energy and Thermal Optimizations in Complex Computer Systems, Dept. of ECE, Georgia Institute of Technology
  • 2010, Variability-Aware VLSI Design Automation for Nanoscale Technologies, IPAM Robust Optimization Workshop
  • 2010, Energy and Thermal Optimization in Complex Computer Systems, Dept of EE, UCLA
  • 2010, Energy and Thermal Optimization in Complex Computer Systems, ISR Colloquium, University of Maryland
  • 2009, You Are The Instructor Now, TA Workshop, Dept of ECE, UMD
  • 2008, Variability-Aware VLSI Design Automation for Nanoscale Technologies, ECS Department, Syracuse University
  • 2008, Variability-Aware VLSI Design Automation for Nanoscale Technologies, ECE Colloquium, University of Maryland
  • 2008, Variability in Nano-scale VLSI Systems, ISR Strategic Advisory Committee Meeting
  • 2006, Optimization Schemes for Variability-Driven VLSI Design Automation, EE Department, University of Toronto
  • 2005, New Directions in Automated VLSI Design, CS Department, Georgetown University
  • 2005, VLSI Design Methodologies Under Fabrication Variability, ICS Department, University of California, Irvine
  • 2005, VLSI Design Methodologies Under Uncertainty, SUN Microsystems
  • 2004, VLSI Design Automation, IBM TJ Watson Research Center, UMD

    Refereed Posters

  • T. Lu, C. Serafy, Z. Yang, and A. Srivastava. “Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs,” Design Automation Conference (DAC’16), 2016
  • Zhiyuan Yang, Ankur Srivastava, “Physical Co-Design for Micro-Fluidically Cooled 3D ICs,”

    IEEE/ACM Design Automation Conference 2015.

  • Tiantao Lu, Zhiyuan Yang, and Ankur Srivastava, Electromigration-aware Placement for 3D-ICs,

    IEEE/ACM Design Automation Conference (DAC’15), 2015

  • Caleb Serafy, Bing Shi, Ankur Srivastava, Donald Yeung, “Electro-Thermal Co-Design for Micro-Fluidically Cooled 3D ICs,” Design Automation Conference (DAC), (POSTER WORK IN PROGRESS SESSION), 2014

    Refereed Workshops

  • Ankit Mondal and Ankur Srivastava, “Data Driven Optimizations for MTJ based Stochastic Computing”, Workshop on Approximate Computing, October 2016.
  • Xie, Yang, Chongxi Bao, and Ankur Srivastava. “Security-Aware Design Flow for 2.5 D IC Technology.” Proceedings of the 5th International Workshop on Trustworthy Embedded Devices. ACM, 2015.
  • Chongxi Bao, Ankur Srivastava, “A Secure Algorithm for Task Scheduling against Side-channel Attacks,” Proceedings of the 4th International Workshop on Trustworthy Embedded Devices (TrustED)2014
  • Bing Shi, Ankur Srivastava, “Liquid cooling for 3D-ICs,” First International IEEE Workshop on Thermal Modeling and Management: Chips to Data Centers, INVITED 2011
  • A. Davoodi and A. Srivastava, “Variability Driven Gate Sizing for Binning Yield Optimization,” Proc. International Workshop on Logic and Synthesis (IWLS’06), 2006
  • V. Khandelwal and A. Srivastava, “Stochastic Programming Based Optimization Framework in Presence of Variability,” Proc. International Workshop on Logic and Synthesis (IWLS’06), 2006
  • A. Dobhal, V. Khandelwal and A. Srivastava, “Efficient and Accurate Statistical Timing Analysis for Non-Linear, Non-Gaussian Variability With Incremental Attributes,” Proc. International Workshop on Logic and Synthesis (IWLS’06) 2006
  • A. Davoodi and A. Srivastava, “Variability Driven Buffer Insertion Considering Correlations,”

    Proc. International Workshop on Logic and Synthesis (IWLS’05), 2005

  • A. Davoodi and A. Srivastava, “Efficient Stochastic Pruning for Variability-Driven Dual-Vth Leakage Optimization,” Proc. International Workshop on Logic and Synthesis (IWLS’05), 2005
  • V. Khandelwal and A. Srivastava, “A General Framework for Accurate Statistical Timing Analysis Considering Correlations,” Proc. International Workshop on Logic and Synthesis (IWLS’05) 2005
  • V. Khandelwal and A. Srivastava, “On Placement and Sizing of Sleep Transistors in Leakage Critical Circuits,” Proc. International Workshop on Logic Synthesis (IWLS’04) 2004
  • A. Davoodi and A. Srivastava, “Simultaneous Floorplanning and Binding: A Probabilistic Approach,” Proc. International Workshop on Logic and Synthesis (IWLS’04) 2004
  • A. Srivastava, J. Sobaje, M. Potkonjak and M. Sarrafzadeh, “Optimal Node Scheduling for Effective Energy Usage in Sensor Networks,” Proc. IEEE Workshop on Integrated Management of Power Aware Communications, Computing and Networking 2002
  • A. Srivastava, C. Chen and M. Sarrafzadeh, “Exact Algorithm for Modifying Buffer Trees using Buffer Duplication in a Delay Optimization Perspective,” Proc. International Workshop on Logic Synthesis, (IWLS’01) 2001
  • A.Srivastava, R. Kastner and M. Sarrafzadeh, “On The Complexity of Gate Duplication,” Proc. International Workshop on Logic Synthesis (IWLS’00)2000

    Software Demonstrations

    • 2004, Demonstrated techniques for static power optimization, Design Automation Conference, University Booth
    • 2000, Demonstrated techniques for circuit performance optimization, Design Automation Conference, University Booth

    TEACHING, MENTORING AND ADVISING

    Courses Taught

  • ENPM607, Computer System Design and Architecture
  • ENEE759T, Challenges in Automated System Design Methodologies
  • ENEE644, CAD for Digital Systems
  • ENEE640, CMOS VLSI Design
  • ENEE350H/350, Computer Organization
  • ENEE 244, Digital Logic Design
  • ENEE641, Mathematical Foundations for Computer Engineering
  • ENEE 750, VLSI Design Automation

    Teaching Innovations

  • Developed a new graduate course “ENEE759T Challenges in Automated System Design Methodologies”, Dept. of ECE, Univ. of Maryland, College Park
  • Developed a core graduate class on Digital VLSI Design ENEE640. This is a significant addition to the ECE graduate core curriculum. The new course materials including a) power-point slides b) tutorials for using state of the art VLSI Design tools c) design projects etc. have been developed
  • Enhanced the course material for ENEE350
  • Helped put together a new course on embedded systems at the graduate and undergraduate levels, ENEE759V/459V
  • Various contributions to research and teaching environment of the department through my position as the associate chair for graduate affairs. Please see the enclosed section on “Contributions as Associate Chair” for details

    Previous Students

    Doctoral

  • Spring 2016, Dr Caleb Serafy, Oracle Inc.
  • Spring 2016, Dr Tiantao Lu, Cadence Inc.
  • Spring 2016, Dr Yufu Zhang, Synopsys Inc.
  • Spring 2013, Dr. Domenic Forte, Assistant Professor, ECE Dept. University of Florida, Gainesville (ARO Young Investigator Award Winner)
  • Spring 2013, Dr. Bing Shi, Oracle Inc.
  • Spring 2007, Dr. Vishal Khandelwal, offered faculty position at Iowa State University, Synopsys Inc.
  • Spring 2006, Dr. Azadeh Davoodi, Winner NSF CAREER Award 2011, Associate Professor with Tenure, ECE Dept. University of Wisconsin Madison

    Master’s

  • 2007 Ashish Dobhal, Cadence Design Systems
  • 2008 Shruti Dhingra, Hughes Network Systems

    Undergraduate

  • Ankan Jain

    Current Students

  • Fall 2012-Ongoing, Chongxi Bao (expected graduation Spring 2017, Employer Google Inc.)
  • Fall 2013-Ongoing, Yang Xie (expected graduation 2018)
  • Fall 2013-Ongoing, Zhiyuan Yang (expected graduation 2018)
  • Fall 2014-Ongoing, Yuntao Liu (expected graduation 2019)
  • Spring 2016-Ongoing, Ankit Mondal (expected graduation 2021)
  • Fall 2016-Ongoing, Abhishek Chakraborty (expected graduation 2021)

    Advising: Other than Research Direction

    Each year, I am assigned as a faculty mentor for about 10 undergraduate students and as an academic advisor for several incoming graduate students. Therefore, I have acted as a faculty mentor for about 70 undergraduate and graduate students over the years. I have advised them on their course selections, on general academic questions such as the descriptions of various fields in EE and CE, on the benefits of getting involved in research, etc.

    SERVICE AND OUTREACH

    Editorships, Editorial Boards and Reviewing Activities

    Editorial Boards

  • Associate Editor, Elsevier E-Reference Signal Processing (resigned in 2014)
  • 2011-2015, Associate Editor, IEEE Transactions on VLSI
  • Associate Editor, IEEE Transactions on CAD
  • Associate Editor, Elsevier Integration Journal, resigned in 2013

    Reviewing Activities for Journals and Presses

  • Reviewer, IEEE Transactions on Pattern Analysis and Machine Intelligence
  • Reviewer, IEEE Transactions-Computer-Aided-Design
  • Reviewer, IEEE Transactions on VLSI
  • Reviewer, ACM Transactions on Design Automation of Electronic Systems
  • Reviewer, IEEE Transactions on Computer

    Reviewing Activities for Agencies and Foundations

  • Reviewer, US Civilian Research Development Fund (CRDF)
  • National Science Foundation
  • Department of Energy

    Committees, Professional & Campus Service

    Campus Service – Department

  • 2013-Ongoing, ECE Associate Chair for Graduate Affairs
  • 2012-2013, Graduate Studies and Research Committee, ECE Department
  • 2012-2014, Department Council, ECE Department
  • 2012-2013, ECE Cybersecurity Search Committee
  • 2010-2012, Graduate Studies and Research Committee, ECE Department
  • 2010-2012, ECE Salary Committee
  • 2010-2012, Department APT Committee
  • 2008-2010, Graduate Studies and Research Committee, ECE Department
  • 2008-2010, Department Council, ECE Department
  • 2008-2012, ECE PhD Qualifying Committee
  • 2006-2008, Graduate Studies and Research Committee, ECE Department
  • 2004-2006, Facilities and Services Committee, ECE Department

    Campus Service – College

  • 2010-2012, College of Engineering Council
  • 2012, College APT Committee, 2011, 2012

    Campus Service – Institute for Systems Research

  • 2014-2015, Institute for Systems Research APT Committee
  • 2012-2013, Institute for Systems Research Education Committee
  • 2010-2012, Institute for Systems Research Salary Committee
  • 2009-2011, Institute for Systems Research Facilities and Services Committee
  • 2010, Institute for Systems Research Seed Grant Review Committee

    Conference Organization

  • 2003, Great Lakes Symposium on VLSI, Session Chair
  • 2004, International Conference on Computer Aided Design, Session Chair
  • 2005, International Conference on Computer Aided Design, Session Chair
  • 2005, International Conference on Computer Design, Session Chair
  • 2012, International Symposium on VLSI, Session Chair
  • 2010, Organizing Committee: Green Communications Workshop
  • 2013, VLSI Design, Track Chair, (leading the EDA track of the conference)
  • 2012, International Symposium on VLSI, Publicity Chair
  • 2013, Evening tutorial at Semitherm (with Avram Bar-Cohen)
  • 2015, InterPack 2015 Topic Chair (Co-Design)
  • 2015, Panel/Tutorial Chair, Hardware Oriented Security and Trust
  • 2016, Finance Chair, Hardware Oriented Security and Trust

    Conference Committees

  • Hardware Oriented Security and Trust 2017, 2016, 2015, 2014
  • VLSI Design 2013 (track chair)
  • International Green Computing Conference 2012, 2011
  • International Symposium on VLSI 2012
  • International Symposium on Physical Design ISPD 2010, 2009, 2008
  • Design Automation Conference 2017, 2009, 2008, 2007
  • International Conference on Computer Design, ICCD 2008, 2007, 2006, 2005
  • International Conference on Computer Aided Design ICCAD 2006, 2005, 2004
  • Great Lakes Symposium on VLSI GLSVLSI 2006, 2005, 2004, 2003

    AWARDS, HONORS AND RECOGNITION

  • 2014, ISR Outstanding Faculty Award
  • 2012, Best Paper Award, International Symposium on VLSI
  • 2012, Best Paper Nomination, Design Automation Conference
  • 2011, Best Student Paper Award, NASA/ESA Conference on Adaptive Hardware and Systems
  • 2008, George Corcoran Outstanding Teaching Award, ECE Department University of Maryland, 2007-2008
  • 2007, Best Paper Award, International Symposium on Physical Design
  • 2003, Best Paper Nomination, International Conference on Computer Aided Design
  • 2003, ACM Design Automation Best Dissertation Award Nomination
  • 2002, Outstanding PhD Dissertation Award, Computer Science Department, UCLA
  • Honored at Scholarship and Research Celebration, University of Maryland
  • Research Cited in an EE TimesArticle, http://www.eet.com/news/latest/showArticle.jhtml?articleID=185302541
  • Research Cited in EE TimesArticle, http://www.eetimes.com/news/design/showArticle.jhtml?articleID=198100044
  • ACM Distinguished Speaker