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PUBLICATIONS

Books | Book Chapters | Articles in Refereed Journals | Published Conference Proceedings | Invited Talks | Refereed Posters | Refereed Workshops

Books

  1. Sapatnekar, A. Srivastava, Y. Zhang and B. Shi, “Thermally-Informed Design of Microelectronic Components”, Encyclopedia of Thermal Packaging, World Scientific Publishers, 2014

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Book Chapters

  1. Chongxi Bao, Yang Xie, Yuntao Liu, and Ankur Srivastava. “Reverse Engineering-Based Hardware Trojan Detection.” In The Hardware Trojan War, pp. 269-288. Springer, Cham, 2018.
  2. Yuntao Liu, Yang Xie, and Ankur Srivastava. “Security in Emerging Fabrication Technologies.” In Security Opportunities in Nano Devices and Emerging Technologies, CRC Press, 2018.
  3. Yang Xie, Chongxi Bao and Ankur Srivastava, “3D/2.5 D IC-Based Obfuscation”, Hardware Protection through Obfuscation/Edited by Domenic Forte, Swarup Bhunia and Mark M. Tehranipoor, Springer International Publishing, 2017
  4. Tiantao Lu and Ankur Srivastava, “Detailed Electrical and Reliability Study of Tapered TSVs”, Physical Design for 3D Integrated Circuits/Edited By Aida Todri-Sanial, Chuan Seng Tan, CRC Press 2015
  5. Caleb Serafy , Ankur Srivastava, “Leakage Power: Physical Mechanisms and Possible Solutions” Electronics Cooling , December 2014 (Magazine)
  6. Bing Shi and Ankur Srivastava, Dynamic Thermal Management Considering Accurate Temperature-Leakage Interdependency”, Cooling of Microelectronic and Nanoelectronic Equipment, WSPC Series in Advanced Integration and Packaging, 2014
  7. Bing Shi and Ankur Srivastava, “Micro-Fluidic Cooling for Stacked 3D-ICs: Fundamentals, Modeling and Design”, Advances in Computers / Edited by Ali Hurson, Vol. 88, Elsevier, 2013
  8. Bing Shi and Ankur Srivastava, “Thermal and Power-Aware Task Scheduling and Data Placement for Storage Centric Datacenters”, Handbook of Energy-Aware and Green Computing / Edited by Sanjay Ranka and Ishfaq Ahmad, Vol. 1, CRC Press, 2012
  9. R. Gopalan, W. Schwartz, R. Chellappa, and A. Srivastava. “Face detection”, A Guide to Visual Analysis of Humans: Looking at People, T. Moeslund et al (Eds), Springer 2011
  10. V. Khandelwal and A. Srivastava, “Basic Algorithmic Techniques “, C. Alpert, D. Mehta and S. Sapatnekar Edited Handbook of Algorithms for Physical Design Automation, CRC Press 2009
  11. A. Srivastava, J. Sobaje, M. Potkonjak and M. Sarrafzadeh, “Optimal Node Scheduling for Effective Energy Usage in Sensor Networks“, System level Power Optimization for Wireless Multimedia Communication, Kulwer Academic Publishers, 2002

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Articles in Refereed Journals

  1. Ankit Mondal and Ankur Srivastava, “In-situ Stochastic Training of MTJ Crossbars with Machine Learning Algorithms”, ACM Journal on Emerging Technologies in Computing Systems (JETC), March 2019.
  2. Zhiyuan Yang, Caleb Serafy, Tiaotao Lu and Ankur Srivastava. “Enhanced Phase-driven Q-learning Based DRM for Multi-core Processors”, accepted by TCAD, 2018
  3. Yuntao Liu, Yang Xie, Chongxi Bao, and Ankur Srivastava. “A Combined Optimization-Theoretic and Side-Channel Approach for Attacking Strong Physical Unclonable Functions.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26, no. 1 (2018): 73-81.
  4. Yang Xie, and Ankur Srivastava. “Anti-SAT: Mitigating SAT Attack on Logic Locking.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2018).
  5. Tiantao Lu, C. Serafy; Z. Yang; S. Samal; S. K. Lim; A. Srivastava, “TSV-based 3D ICs: Design Methods and Tools,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol.PP, no.99, pp.1-1, February 2017
  6. Yang Xie, Chongxi Bao and Ankur Srivastava, “Security-Aware 2.5D IC Design Flow Against Hardware IP Piracy”, IEEE Computer, To Appear 2017
  7. Tiantao Lu, and Ankur Srivastava, “Low-Power Clock Tree Synthesis for 3D-ICs”, To Appear, ACM Transactions on Design Automation of Electronic Systems (TODAES). 2017
  8. Serafy, Z. Yang , A. Srivastava, Y. Hu and Y. Joshi, “Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks”, IEEE Design & Test, vol. 33, no. 2, pp. 40-48, April 2016
  9. Serafy, A. Bar-Cohen, A. Srivastava and D. Yeung, “Unlocking the True Potential of 3-D CPUs With Microfluidic Cooling,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 4, pp. 1515-1523, April 2016
  10. Yang Xie, C. Bao, C. Serafy, T. Lu, A. Srivastava and M. Tehranipoor, “Security and Vulnerability Implications of 3D ICs,” IEEE Transactions on Multi-Scale Computing Systems, vol. 2, no. 2, pp. 108-122, April-June 1 2016
  11. Bao, Chongxi, Domenic Forte, and Ankur Srivastava. “On Reverse Engineering-Based Hardware Trojan Detection”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 1, pp. 49-57, Jan. 2016.
  12. Lu and A. Srivastava, “Modeling and Layout Optimization for Tapered TSVs,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 12, pp. 3129-3132, Dec. 2015.
  13. Bao, Chongxi, Domenic Forte, and Ankur Srivastava. “Temperature Tracking: Toward Robust Run-Time Detection of Hardware Trojans”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 10, pp. 1577-1585, Oct. 2015.
  14. C. Serafy and A. Srivastava, “TSV Replacement and Shield Insertion for TSV–TSV Coupling Reduction in 3-D Global Placement,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 4, pp. 554-562, April 2015.
  15. Caleb Serafy, Bing Shi, Ankur Srivastava, “A Geometric Approach to Chip-Scale TSV Shield Placement for the Reduction of TSV Coupling in 3D-ICs”, Elsevier Integration, the VLSI Journal: VLSI for the New Era, Volume 47 Issue 3, June 2014
  16. Yufu Zhang, Bing Shi and Ankur Srivastava, “A Statistical Framework for Designing On-chip Thermal Sensing Infrastructure in Nano-scale Systems”, IEEE Transactions on Very Large Scale Integration Systems.  Vol. 22, No. 2, February 2014
  17. INVITED: Avram Bar-Cohen, Ankur Srivastava and Bing Shi, “Thermo-Electrical Co-Design of 3D ICs: Challenges and Opportunities”, Computational Thermal Sciences, Begell House Publishers, Vol5, Issue 6, 2013
  18. Bing Shi and Ankur Srivastava, “Optimized Micro-Channel Design for Stacked 3D ICs”, IEEE Transactions on Computer Aided Design 33(1):90-100 · December 2013
  19. Domenic Forte and Ankur Srivastava, “Improving the Quality of Delay-based PUFs via Optical Proximity Correction”, IEEE Transactions on Computer Aided Design (TCAD), Vol. 32, No. 12, December2013
  20. Bing Shi, Ankur Srivastava and Avram Bar-Cohen, “Co-design of Micro-fluidic Heat Sink and Thermal TSV for Cooling of 3D-IC”, IET Circuits, Devices & Systems Journal, Volume 7, Issue 5, September 2013
  21. Bing Shi, Yufu Zhang and Ankur Srivastava,”Dynamic Thermal Management Under Soft Thermal Constraints”, IEEE Transactions on VLSI., Vol. 21, No. 11, November 2013
  22. Domenic Forte, Ankur Srivastava, “Resource-Aware Architectures for Adaptive Particle Filter Based Visual Target Tracking”, ACM Transactions on Design Automation of Electronic Systems, Volume 18 Issue 2, March 2013.
  23. Domenic Forte, Ankur Srivastava, “Energy and Thermal-Aware Video Coding via Encoder/Decoder Workload Balancing”, ACM Transactions on Embedded Computing Systems, Volume 12 Issue 2s, May 2013.
  24. Domenic Forte, Ankur Srivastava, “Thermal-Aware Sensor Scheduling for Distributed Estimation”, ACM Transactions on Sensor Networks, Vol. 9, No. 4, Nov. 2013.
  25. Bing Shi, Yufu Zhang and Ankur Srivastava, “Accelerating Gate Sizing Using Graphics Processing Units”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 31, No 1, pp. 160-164, Jan. 2012.
  26. Bing Shi and Ankur Srivastava, “Unified Datacenter Power Management Considering On-Chip and Air Temperature Constraints”, Elsevier Sustainable Computing: Informatics and Systems journal. Vol. 1, No. 2, pp. 91-98, Jun. 2011.
  27. Yufu Zhang, Ankur Srivastava, “Accurate Temperature Estimation Using Noisy Thermal Sensors for Gaussian and Non-Gaussian Cases“, IEEE Transactions on Very Large Scale Integration Systems, Vol.19 , No.9 , pp. 1617-1626, Sept. 2011.
  28. Yufu Zhang, Ankur Srivastava and Mohamed Zahran, “On-Chip Sensor Driven Efficient Thermal Profile Estimation Algorithms”, ACM Transactions on Design Automation of Electronic Systems, Vol. 15, No. 3, May 2010.
  29. A. Davoodi and A. Srivastava, “Variability-Driven Gate Sizing for Binning Yield Optimization”, IEEE Transactions on VLSI Systems, Vol. 16, No 6, pp. 683-692, June 2008.
  30. A. Sankaranarayanan, A. Srivastava and R. Chellappa “Algorithmic and Architectural Optimizations for Computationally Efficient Particle Filtering”, IEEE Transactions on Image Processing, Vol. 17, No. 5, pp. 737-748, May 2008.
  31. V. Khandelwal and A. Srivastava, “Variability-Driven Formulation for Simultaneous Gate Sizing and Post-Silicon Tunability Allocation,” IEEE Transactions on Computer Aided Design, Vol. 27, No. 4, pp. 610-620, April 2008.
  32. M. Peckerar, D. Sander, A. Srivastava, A. Foli and U. Vishkin, “Electron Beam and Optical Proximity Effect Reduction for Nanolithography: New Results”, Journal on Vacuum Science and Technology B, Vol. 25, No. 6, 2007.
  33. Khandelwal and A. Srivastava, “Active Mode Leakage Reduction Using Fine-Grained Forward Body Biasing Strategy”, Elsevier Integration the VLSI Journal, Vol. 40, No. 4, pp. 561-570, July 2007.
  34. V. Khandelwal and A. Srivastava, “Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors”, IEEE Transactions on Computer Aided Design, Vol. 26, No. 7, pp. 1246-1255, July 2007.
  35. V. Khandelwal and A. Srivastava, “A Quadratic Modeling-Based Framework for Accurate Statistical Timing Analysis Considering Correlation”, IEEE Transactions on VLSI Systems, Vol. 15, No. 2, pp. 206-215, February 2007.
  36. A. Davoodi, V. Khandelwal, A. Srivastava, “Probabilistic Evaluation of Solutions in Variability-Driven Optimization”, IEEE Transactions on Computer Aided Design, Vol. 25, No 12, pp. 3010-3016, December 2006
  37. J. L. Wong, A. Davoodi, V. Khandelwal, A. Srivastava, M. Potkonjak, “A Statistical Methodology for Wire-length Prediction”, IEEE Transactions on Computer Aided Design, Vol. 25, No. 7, pp. 1327-1336, July 2006
  38. A. Davoodi, A. Srivastava, “Effective Techniques for the Generalized Low Power Binding Problem”, ACM Transactions on Design Automation of Electronic Systems, Vol. 11, No. 1, pp. 52-69, January 2006.
  39. A. Davoodi and A. Srivastava, “Power-Driven Simultaneous Resource Binding and Floorplanning: A Probabilistic Approach”, IEEE Transactions on VLSI Systems, Vol. 13, No. 8, pp. 934-942, August 2005.
  40. V. Khandelwal, A. Davoodi, A. Srivastava, “Simultaneous Vt Selection and Assignment for Leakage Optimization”, IEEE Transactions on VLSI Systems, Vol. 13, No. 6, pp. 762-765, June 2005.
  41. A. Davoodi and A. Srivastava: “Voltage Scheduling Under Uncertainties: A Risk Management Perspective”, ACM Transactions on Design Automation of Electronic Systems, Vol. 10, No. 2, pp.354-368, April 2005.
  42. A. Srivastava, S. Ogrenci Memik, B. Kyung Choi and M. Sarrafzadeh, “On Effective Slack Management in the Post Scheduling Phase”, IEEE Transactions on Computer Aided Design, Vol. 24, No. 4, pp. 645-653, April 2005.
  43. A. Davoodi, V. Khandelwal and A. Srivastava, “Empirical Model for Net Length Probability Distribution and Applications”, IEEE Transactions on VLSI Systems, Vol. 12, No. 10, pp. 1066-1075, October 2004.
  44. Srivastava, R. Kastner, C. Chen and ,M. Sarrafzadeh, “Timing Driven Gate Duplication”, IEEE Transactions on VLSI Systems, Vol. 12, No 1, pp. 42-51, January 2004.
  45. C. Chen, E. Bozorgzadeh, A. Srivastava and M. Sarrafzadeh, “Budget Management and its Applications”, ALGORITHMICA, Vol. 34, pages 261-275, 2002.
  46. A. Srivastava E. Kursun and M. Sarrafzadeh, “Predictability in RT-Level Designs”, Journal of Circuits, Systems and Computers, Special Issue on Low Power IC Designs, Vol 11 No; 4,; pp. 323 – 332, August 2002.
  47. S. Ghiasihafezi, A. Srivastava, X. Yang and M. Sarrafzadeh, “Optimal Energy Aware Clustering in Sensor Networks,” SENSORS Journal, Vol. 2, No. 7, pp. 258-269, July 2002.
  48. A. Srivastava, C. Chen and Majid Sarrafzadeh, “Timing Driven Gate Duplication in the Technology Independent Stage”, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, pp. 2673-2680, November 2001.
  49. C.Chen, A. Srivastava and M. Sarrafzadeh, “On Gate-Level Power Optimization Using Dual Supply Voltages”, IEEE Transactions on VLSI Systems, Vol. 9, No 5, pp. 616-629, October 2001.
  50. A. Srivastava, R. Kastner and M. Sarrafzadeh, “On the Complexity of Gate Duplication”, IEEE Transactions on Computer Aided Design, Vol. 20, No. 9, pp. 1170-1176, September. 2001.
  51. A.H. Farrahi, C. Chen, A. Srivastava, M. Sarrafzadeh and G. Tellez, “Activity Driven Clock Design”, IEEE Transactions on Computer Aided Design, Vol. 20, No. 6, pp. 705-714, June 2001.

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Published Conference Proceedings

  1. Liu, Yuntao and Ankur Srivastava. “GANRED: GAN-based Reverse Engineering of DNNs via Cache Side-Channel.” 2020 ACM Workshop on Cloud Computing Security Workshop (CCSW 2020)
  2. Liu, Yuntao, Michael Zuzak, Yang Xie, Abhishek Chakraborty, and Ankur Srivastava. “Strong Anti-SAT: Secure and Effective Logic Locking.” 2020 IEEE International Symposium on Quality Electronics Design (ISQED)
  3. Liu, Yuntao, Ankit Mondal, Abhishek Chakraborty, Michael Zuzak, Nina Jacobsen, Daniel Xing, and Ankur Srivastava. “A Survey on Neural Trojans.” 2020 IEEE International Symposium on Quality Electronics Design (ISQED)
  4. M. Zuzak and A.Srivastava, “Memory Locking: An Automated Approach to Processor Design Obfuscation”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2019.
  5. Y. Liu et al.,”Mitigating Reverse Engineering Attacks on Deep Neural Networks”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2019.
  6. A. Chakraborty and A.Srivastava, “Hardware-Software Co-design Based Obfuscation of Hardware Accelerators”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2019.
  7. Abhishek Chakraborty, Yuntao Liu, and Ankur Srivastava, “TimingSAT: Timing Profile Embedded SAT Attack” in International Conference On Computer Aided Design (ICCAD), 2018.
  8. Zhiyuan Yang, Michael Zuzak, Ankur Srivastava. “HMCTherm: A Cycle-accurate HMC Simulator Integrated with detailed Power and Thermal Simulation”, MEMSYS, 2018
  9. Ankit Mondal and Ankur Srivastava, “In-situ Training of MTJ Crossbar based Neural Networks”, In Low Power Electronics and Design (ISLPED), 2018, IEEE/ACM International Symposium on, 2018
  10. Zhiyuan Yang and Ankur Srivastava, “Value-driven Synthesis for Neural Networks ASICs”, In Low Power Electronics and Design (ISLPED), 2018, IEEE/ACM International Symposium on, 2018
  11. Abhishek Chakraborty, Yang Xie, and Ankur Srivastava. “GPU Obfuscation: Attack and Defense Strategies.” In Proceedings of the 55th Annual Design Automation Conference (DAC), 2018
  12. Ankit Mondal and Ankur Srivastava, “Power Optimizations in MTJ-based Neural Networks through Stochastic Computing”, In Low Power Electronics and Design (ISLPED), 2017, IEEE/ACM International Symposium on, 2017
  13. Yuntao Liu, Yang Xie, and Ankur Srivastava. “Neural trojans.” In Computer Design (ICCD), 2017 IEEE International Conference on, pp. 45-48. IEEE, 2017.
  14. Yuntao Liu, Chongxi Bao, Yang Xie, and Ankur Srivastava. “Introducing TFUE: The trusted foundry and untrusted employee model in IC supply chain security.” In Circuits and Systems (ISCAS), 2017 IEEE International Symposium on, pp. 1-4. IEEE, 2017.
  15. Abhishek Chakraborty, Yang Xie, and Ankur Srivastava. “Template Attack Based Deobfuscation of Integrated Circuits.” In Computer Design (ICCD), 2017 IEEE International Conference on, pp. 41-44. IEEE, 2017.
  16. Abhishek Chakraborty, Ankit Mondal, and Ankur Srivastava. “Correlation Power Analysis Attack against STT-MRAM Based Cryptosystems.” In Hardware Oriented Security and Trust (HOST), 2017 IEEE International Symposium on. IEEE, 2017.
  17. Yang Xie and Ankur Srivastava. “Delay Locking: Security Enhancement of Logic Locking against IC Counterfeiting and Overproduction.” Proceedings of the 54th Annual Design Automation Conference 2017. ACM, 2017.
  18. Z. Yang, C. Serafy, T. Lu, A. Srivastava. “Phase-driven Learning-based Dynamic Reliability Management For Multi-core Processors.” Proceedings of the 54th Annual Design Automation Conference 2017. ACM, 2017.
  19. Caleb Serafy, Zhiyuan Yang and Ankur Srivastava, “Design Space Modeling and Simulation for Physically Constrained 3D CPUs”, in Proc. IEEE/ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2017
  20. Chongxi Bao and Ankur Srivastava, “Exploring Timing Side-channel Attacks on Path-ORAMs”, Hardware-Oriented Security and Trust (HOST), IEEE International Symposium on, May 2017.
  21. Yuntao Liu, Yang Xie, Chongxi Bao, Ankur Srivastava, “An Optimization-Theoretic Approach for Attacking Physical Unclonable Functions”, IEEE/ACM International Conference on Computer Aided Design (ICCAD), Nov. 2016
  22. Yang Xie, Ankur Srivastava, “Mitigating SAT Attack on Logic Locking”, Conference on Cryptographic Hardware and Embedded Systems (CHES), August, 2016.
  23. Tiantao Lu, Caleb Serafy, Zhiyuan Yang, and Ankur Srivastava. “Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs.”, Proceedings of the 2016 International Symposium on Low Power Electronics and Design (ISLPED). ACM, August 2016.
  24. Lu, Z. Yang and A. Srivastava, “Post-Placement Optimization for Thermal-Induced Mechanical Stress Reduction,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, PA, July 2016, pp. 158-163.
  25. Z. Yang and A. Srivastava. “Physical Co-Design for Micro-Fluidically Cooled 3D ICs,” IEEE Intersociety Conference on Thermal and Thermo-mechanical Phenomena in Electronic Systems (ITherm), May 2016.
  26. Yang, C. Serafy and A. Srivastava. “ECO Based Placement and Routing Frame-work for 3D FPGAs with Micro-Fluidic Cooling,” IEEE Field-Programmable Custom Computing Machines (FCCM), May 2016.
  27. T. Lu, Z. Yang and A. Srivastava, “Electromigration-aware placement for 3D-ICs,” 17th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, 2016, pp. 35-40.
  28. C. Serafy, T. Lu and A. Srivastava. “Thermal-Reliability Physical Co-Optimization During Architectural Design Space Exploration of 3D-CPUs.”, Proceedings of the Government Microcircuit Applications and Critical Technology Conference (GOMACTech). 2016.
  29. Zhiyuan Yang, Ankur Srivastava, “Physical Design of 3D FPGAs Embedded with Micro-channel-based Fluidic Cooling,” In Proceedings of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016, (pp. 54-63).
  30. Zhiyuan Yang, Ankur Srivastava, “Co-Placement for Pin-Fin Based Micro-Fluidically Cooled 3D ICs.” In ASME InterPACK, June 2015.
  31. Lu, and A. Srivastava, “Electromigration-aware Clock Tree Synthesis for TSV-based 3D-ICs”, in Proc. IEEE/ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2015
  32. Lu, and A. Srivastava, “Electrical-thermal-reliability Co-design for TSV-based 3D-ICS”, in Proc. ASME InterPACK, 2015.
  33. Bao, Chongxi, Yang Xie, and Ankur Srivastava. “A Security-Aware Design Scheme for Better Hardware Trojan Detection Sensitivity.” IEEE Hardware Oriented Security and Trust (HOST),
  34. Bao, Chongxi, and Ankur Srivastava. “3D Integration: New Opportunities in Defense Against Cache-Timing Side-Channel Attacks”33rd IEEE International Conference on Computer Design (ICCD), 2015.
  35. C. Serafy, A. Srivastava, A. Bar-Cohen and D. Yeung. “Design Space Exploration of 3D CPUs and Micro-Fluidic Heatsinks with Thermo-Electrical-Physical Co-Optimization.”, In Proceedings of the ASME International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, 2015
  36. Tiantao Lu and Ankur Srivastava, “Gated Low-power Clock Tree Synthesis for 3D-ICs”, International Symposium on Low Power Electronics and Design (ISLPED), page 319 – 322, August 2014.
  37. Caleb Serafy, Ankur Srivastava, Donald Yeung, “Unlocking the True Potential of 3D CPUs with Micro-Fluidic Cooling,” Proceedings of the IEEE International Symposium on Lower Power Electronics and Design (ISLPED), August 2014
  38. Caleb Serafy, Ankur Srivastava, Donald Yeung, “Continued Frequency Scaling in 3D ICs through Micro-Fluidic Cooling”, Proceedings of the IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), May 2014
  39. C. Bao, D. Forte and A. Srivastava, “On Application of One-class SVM to Reverse Engineering-Based Hardware Trojan Detection”, International Symposium on Quality of Electronic Design, (ISQED), 2014
  40. Serafy and A. Srivastava, “Coupling-Aware Force Driven Placement of TSVs and Shields in 3D-IC layouts”, ACM International Symposium on Physical Design, 2014
  41. C. Serafy and A. Srivastava, “Online TSV Health Monitoring and Built-in Self-Repair to Overcome Aging”, In Proceedings of the 15th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013(DFT}
  42. C. Serafy, B. Shi, A. Srivastava and D. Yeung, “High Performance 3D Stacked DRAM Processor Architectures with Micro-Fluidic Cooling”, In Proceedings of the IEEE 3D System Integration Conference 2013 (3DIC).
  43. T. Lu and A. Srivastava, “Detailed Electrical and Reliability Study on Tapered TSVs”, In Proceedings of the IEEE 3D System Integration Conference 2013 (3DIC).
  44. Domenic Forte, Chongxi Bao and Ankur Srivastava, “Temperature Tracking: An Innovative Run-Time Approach for Hardware Trojan Detection”, International Conference on Computer Aided Design (ICCAD), Nov. 2013.
  45. Caleb Serafy, Ankur Srivastava, “A Geometric Approach to TSV Shield Placement for the Reduction of TSV-TSV Coupling in 3D-ICs”, Great Lakes Symposium on VLSI (GLSVLSI), May, 2013.
  46. Bing Shi, Ankur Srivastava, “Co-optimization of TSV assignment and micro-channel placement for 3D-ICs”, Great Lakes Symposium on VLSI (GLSVLSI), May, 2013.
  47. Bing Shi, Ankur Srivastava, “Thermal Stress Aware 3D-IC Statistical Static Timing Analysis”, Great Lakes Symposium on VLSI (GLSVLSI), May, 2013.
  48. Bing Shi , Ankur Srivastava, Avram Bar-Cohen, “Hybrid 3D-IC Cooling System Using Micro-Fluidic Cooling and Thermal TSVs”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), August 2012 [Best Paper Award]
  49. Domenic Forte, Ankur Srivastava, “Manipulating Manufacturing Variations for Better Silicon-Based Physically Unclonable Functions”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), August 2012.
  50. Domenic Forte , Ankur Srivastava, “On Improving the Uniqueness of Silicon-Based Physically Unclonable Functions Via Optical Proximity Correction”, Design Automation Conference (DAC), June 2012. [DAC Best Paper Candidate]
  51. Bing Shi, Ankur Srivastava, “TSV-Constrained Micro-channel Infrastructure Design for Cooling Stacked 3D-ICs”, International Symposium on Physical Design (ISPD), April 2012.
  52. Domenic Forte, Ankur Srivastava, “Energy-Aware and Quality-Scalable Data Placement and Retrieval for Disks in Video Server Environments”, IEEE International Conference on Computer Design (ICCD), Oct. 2011.
  53. Domenic Forte, Ankur Srivastava, “Adaptable Architectures for Distributed Visual Target Tracking”, IEEE International Conference on Computer Design (ICCD), Oct. 2011.
  54. Bing Shi, Ankur Srivastava, “Cooling of 3D-IC Using Non-Uniform Micro-channels and Sensor Based Dynamic Thermal Management”, invited paper, Forty-Ninth Annual Allerton Conference on Communication, Control, and Computing, Sept. 2011.
  55. Domenic Forte , Ankur Srivastava, “Energy-Aware Video Storage and Retrieval in Server Environments”, International Green Computing Conference, (IGCC), July 2011;
  56. Domenic Forte , Ankur Srivastava, “Resource-Aware Architectures for Particle Filter Based Visual Target Tracking”, International Green Computing Conference, (IGCC), July 2011
  57. Bing Shi , Ankur Srivastava, “Non-Uniform Micro-Channel Design for Stacked 3D-ICs”, Proceedings of IEEE/ACM Design Automation Conference (DAC), June 2011
  58. Domenic Forte , Ankur Srivastava, “Adaptable Video Compression and Transmission using Lossy and Workload Balancing Techniques”, Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on, June 2011 [Winner Best Student Paper Award]
  59. Domenic Forte , Ankur Srivastava, “Energy-Aware Video Coding of Multiple Views via Workload Balancing”, Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on, June 2011
  60. Domenic Forte , Ankur Srivastava, “Energy and Thermal-Aware Video Coding via Encoder/Decoder Workload Balancing”, International Symposium on Low Power Electronics and Design 2010 (ISLPED), Aug. 2010;
  61. Bing Shi , Yufu Zhang, Ankur Srivastava, “Dynamic Thermal Management for Single and Multi-core Processors under Soft Thermal Constraints”, International Symposium on Low Power Electronics and Design 2010 (ISLPED), Aug. 2010
  62. Bing Shi , Ankur Srivastava, “Thermal and Power-Aware Task Scheduling for Hadoop Based Storage Centric Datacenters”, International Green Computing Conference (IGCC), Aug. 2010
  63. Yufu Zhang and Ankur Srivastava, “Adaptive and Autonomous Thermal Tracking for High Performance Computing Systems”, Proceedings of IEEE/ACM Design Automation Conference, (DAC) June 2010
  64. Domenic Forte , Ankur Srivastava, “Thermal-Aware Sensor Scheduling for Distributed Estimation”, International Conference on Distributed Computing in Sensor Systems 2010 (DCOSS), June 2010
  65. Y. Zhang, B. Shi and A. Srivastava, “A Statistical Framework for Designing On-Chip Thermal Sensing Infrastructure in Nano-Scale Systems”, Procs of ACM International Symposium on Physical Design (ISPD), March 2010
  66. Y. Zhang and A. Srivastava, “Accurate Temperature Estimation Using Noisy Thermal Sensors”, Proc. Design Automation Conference (DAC), July 2009
  67. Y. Zhang , A. Srivastava and M. Zahran, “Chip Level Thermal Profile Estimation Using On-chip Temperature Sensors“ , Proceedings of IEEE International Conference on Computer Design (ICCD08), October 2008
  68. V. Khandelwal and A. Srivastava, “Monte Carlo Driven Stochastic Optimization Framework for Handling Fabrication Variability”, Proc. International Conference on Computer Aided Design (ICCAD07), November 2007
  69. J. Wong, A. Davoodi, V. Khandelwal, A. Srivastava and M. Potkonjak, “Statistical Timing Analysis Using Kernel Smoothing”, Proc. International Conference on Computer Design (ICCD07), October 2007
  70. V. Khandelwal and A. Srivastava, “Variability-Driven Formulation for Simultaneous Gate Sizing and Post-Silicon Tunability Allocation ”, Proc. International Symposium on Physical Design (ISPD07) April 2007. [WINNER BEST PAPER AWARD]
  71. A. Dobhal, V. Khandelwal and A. Srivastava, “Efficient and Accurate Statistical Timing Analysis for Non-linear, Non-Gaussian Variability with Incremental Attributes”, Proc International Conference on VLSI Design January 2007
  72. A. Dobhal, V. Khandelwal, A. Davoodi and A. Srivastava, “Variability Driven Joint Leakage, Delay Optimization With Provable Convergence“, Proc. International Conference on VLSI Design January 2007
  73. A. Davoodi and A. Srivastava, “Variability-Driven Gate Sizing for Binning Yield Optimization”, Proc. Design Automation Conference (DAC06) July 2006
  74. A. Davoodi and A. Srivastava, “Probabilistic Evaluation of Solutions in Variability-Driven Optimization”, Proc. International Symposium on Physical Design (ISPD’06) , April 2006
  75. A. Davoodi and A. Srivastava, “Variability-Driven Buffer Insertion Considering Correlations”, Proc. of International Conference on Computer Design (ICCD’05); October 2005;
  76. A. Sankaranarayanan, R. Chellappa and A. Srivastava, “Algorithmic and Architectural Design Methodology for Particle Filters in Hardware”, Proc. of International Conference on Computer Design (ICCD’05); October 2005;
  77. A. Davoodi and A. Srivastava, “Probabilistic Dual-Vth Leakage Optimization Under Variability ”, International Symposium on Low Power Electronics and Design; (ISLPED’05) August 2005
  78. V.; Khandelwal and A. Srivastava, “A General Framework for Accurate Statistical Timing Analysis Considering Correlations”, Proc. Design Automation Conference, (DAC’05) June 2005
  79. L. Yuan, G Qu and A. Srivastava, “VLSICAD Tool Protection by Birthmarking Design Solutions ”, Proc. Great Lakes Symposium on VLSI (GLSVLSI’05) April 2005
  80. A. Davoodi and A. Srivastava, “Wake-up Protocols for Controlling Current Surges in MTCMOS-based Technology”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’05),; January 2005
  81. A. Davoodi and A. Srivastava, “Simultaneous Floorplanning and Binding: A Probabilistic Approach”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’05),; January 2005;
  82. V. Khandelwal, A. Davoodi and A. Srivastava, “Efficient Statistical Timing Analysis through Error Budgeting”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
  83. V. Khandelwal and A. Srivastava, “Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
  84. J. Wong, A. Davoodi, V. Khandelwal, A. Srivastava and M. Potkonjak, “Wire-length Prediction using Statistical Techniques”,; Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
  85. A. Davoodi, V. Khandelwal and A. Srivastava, “Variability Inspired Implementation Selection Problem”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004
  86. V. Khandelwal and A. Srivastava, “Active Mode Leakage Reduction Using Fine-Grained Forward Body Biasing Strategy “, Proc.International Symposium on Low Power Electronics and Design (ISLPED’04) August 2004.
  87. A. Davoodi, V. Khandelwal and A. Srivastava, “High Level Techniques for Power-Grid Noise Immunity “, Proc. Great Lakes Symposium on VLSI (GLSVLSI’04) , April 2004
  88. A. Srivastava et al: “Achieving Design Closure Through Delay Relaxation Parameter”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’03), November 2003
  89. V. Khandelwal, A. Davoodi, A. Nanavati and A. Srivastava, “A Probabilistic Approach to Buffer Insertion Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’03), November 2003 [BEST PAPER AWARD NOMINEE].
  90. A. Davoodi and A. Srivastava, “Effective Graph Theoretic techniques for the Generalized Low Power Binding Problem”, Proc. International Symposium on Low Power Design (ISLPED’03) August 2003
  91. A. Davoodi and A. Srivastava, “Voltage Scheduling Under Uncertainties: A Risk Management Perspective”, ;Proc. International Symposium on Low Power Design (ISLPED’03) August 2003
  92. A. Srivastava, “Simultaneous Vt Selection and Assignment for Leakage Optimization”, Proc. International Symposium on Low Power Design (ISLPED’03) August 2003
  93. A. Srivastava and M. Sarrafzadeh, “Predictability: Definition Analysis and Optimization”, Proc. International Conference on Computer Aided Design (ICCAD’02) November. 2002
  94. E. Kursun, A. Srivastava, S. Ogrenci Memik and M. Sarrafzadeh, “Early Evaluation techniques for Low Power Binding”, Proc. International Symposium on Low Power Design; (ISLPED’02) August. 2002
  95. S. Ogrenci-Memik, A. Srivastava and M. Sarrafzadeh, “Algorithmic Aspects of Uncertainty Driven Scheduling”, Proc. IEEE International Symposium on Circuits and Systems (ISCAS’02) May. 2002
  96. M. Sarrafzadeh, E. Bozorgzadeh, R. Kastner and A. Srivastava, “Design and Analysis of Physical Design Algorithms“, Proc. International Symposium on Physical Design (ISPD’01) April 2001
  97. A. Ranjan, A. Srivastava and M. Sarrafzadeh, “Layout Aware Retiming“, Proc. Great Lakes Symposium on VLSI (GLSVLSI’01), March 2001.
  98. R. Murgai, S. Chakraborthy, R. Carragher, M. Prasad, A. Srivastava, N. Vemuri and H. Yoshidd, “Layout Driven Logic Optimization”,, Proc. Design Automation and Test in Europe (DATE’01) February 2001.
  99. A. Srivastava, C. Chen and M. Sarrafzadeh, “Timing Driven Gate Duplication in the Technology Independent Stage“, Proc. Asia and South Pacific Design Automation Conference, (ASPDAC’01) January 2001
  100. A.Srivastava, R. Kastner and M. Sarrafzadeh, “Timing Driven Gate Duplication: Complexity Issues and Algorithms“, Proc. International Conference on Computer Aided Design (ICCAD’00) November. 2000

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Invited Talks

  • Conferences, Workshops and Talks
  • 2016, Logic Obfuscation, Microprocessor Test and Verification Conference
  • 2016, Hardware Security, Northrop Grumman
  • 2016,  Microfluidic Thermal Management and Thermo-Electronic Co-Design for Chip Stacks, ECTC Tutorial
  • 2015, Electro-Thermo-Mechanical Co-Design of Fluidically Cooled Integrated Circuits, DARPA Modeling Workshop
  • 2015,  Power Performance and Reliability Codesign, MODSIM Workshop
  • 2015,  Power Performance and Reliability Codesign for 3D ICs, HMC Workshop
  • 2014, Microfluidic Thermal Management and Thermo-Electronic Co-Design for Chip Stacks, ECTC-ITherm, Tutorial (with Avi Bar-Cohen)
  • 2014, Electro-Thermo-Mechanical Co-Design of Fluidically Cooled Integrated Circuits, MODSIM Workshop
  • 2013, Electrical Micro-fluidic Co-Design, DARPA Kickoff Meeting
  • 2013, Energy and Thermal Optimization in Complex Computer Systems, Indian Institute of Science
  • 2013, Electro-Thermo-Mechanical Co-Design of Fluidically Cooled Integrated Circuits, DARPA Industry Day Poster
  • 2013, Microfluidic Thermal Management and Thermo-Electronic Co-Design for Chip Stacks, SemiTherm, Evening Tutorial (with Avram Bar-Cohen)
  • 2012, Hardware Security, LTS Colloquium
  • 2012, Hardware Security, ECE Invited Talk to L3 Communications
  • 2010, On-Chip Thermal Sensing, ECE Colloquium, University of Illinois Urbana Champagne
  • 2010, On-Chip Thermal Sensing, EECS, University of Michigan Ann Arbor
  • 2010, Energy and Thermal Optimizations in Complex Computer Systems, Dept. of ECE, Georgia Institute of Technology
  • 2010, Variability-Aware VLSI Design Automation for Nanoscale Technologies, IPAM Robust Optimization Workshop
  • 2010, Energy and Thermal Optimization in Complex Computer Systems, Dept of EE, UCLA
  • 2010, Energy and Thermal Optimization in Complex Computer Systems, ISR Colloquium, University of Maryland
  • 2009, You Are The Instructor Now, TA Workshop, Dept of ECE, UMD
  • 2008, Variability-Aware VLSI Design Automation for Nanoscale Technologies, ECS Department, Syracuse University
  • 2008, Variability-Aware VLSI Design Automation for Nanoscale Technologies, ECE Colloquium, University of Maryland
  • 2008, Variability in Nano-scale VLSI Systems, ISR Strategic Advisory Committee Meeting
  • 2006, Optimization Schemes for Variability-Driven VLSI Design Automation, EE Department, University of Toronto
  • 2005, New Directions in Automated VLSI Design, CS Department, Georgetown University
  • 2005, VLSI Design Methodologies Under Fabrication Variability, ICS Department, University of California, Irvine
  • 2005, VLSI Design Methodologies Under Uncertainty, SUN Microsystems
  • 2004, VLSI Design Automation, IBM TJ Watson Research Center, UMD

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Refereed Posters

  • Lu, C. Serafy, Z. Yang, and A. Srivastava. “Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs,” Design Automation Conference (DAC’16), 2016
  • Zhiyuan Yang, Ankur Srivastava, “Physical Co-Design for Micro-Fluidically Cooled 3D ICs,” IEEE/ACM Design Automation Conference 2015.
  • Tiantao Lu, Zhiyuan Yang, and Ankur Srivastava, Electromigration-aware Placement for 3D-ICs, IEEE/ACM Design Automation Conference (DAC’15), 2015
  • Caleb Serafy, Bing Shi, Ankur Srivastava, Donald Yeung, “Electro-Thermal Co-Design for Micro-Fluidically Cooled 3D ICs,” Design Automation Conference (DAC), (POSTER WORK IN PROGRESS SESSION), 2014

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Refereed Workshops

  • Yang Xie, Chongxi Bao, Yuntao Liu and Ankur Srivastava, “2.5 D/3D Integration Technologies for Circuit Obfuscation”, Microprocessor and SOC Test and Verification (MTV), 2016 17th International Workshop on.
  • Ankit Mondal and Ankur Srivastava, “Data Driven Optimizations for MTJ based Stochastic Computing”, Workshop on Approximate Computing, October 2016.
  • Xie, Yang, Chongxi Bao, and Ankur Srivastava. “Security-Aware Design Flow for 2.5 D IC Technology.” Proceedings of the 5th International Workshop on Trustworthy Embedded Devices. ACM, 2015.
  • Chongxi Bao, Ankur Srivastava, “A Secure Algorithm for Task Scheduling against Side-channel Attacks,” Proceedings of the 4th International Workshop on Trustworthy Embedded Devices (TrustED)2014
  • Bing Shi, Ankur Srivastava, “Liquid cooling for 3D-ICs,” First International IEEE Workshop on Thermal Modeling and Management: Chips to Data Centers, INVITED 2011
  • A. Davoodi and A. Srivastava, “Variability Driven Gate Sizing for Binning Yield Optimization,” Proc. International Workshop on Logic and Synthesis (IWLS’06), 2006
  • V. Khandelwal and A. Srivastava, “Stochastic Programming Based Optimization Framework in Presence of Variability,” Proc. International Workshop on Logic and Synthesis (IWLS’06), 2006
  • A. Dobhal, V. Khandelwal and A. Srivastava, “Efficient and Accurate Statistical Timing Analysis for Non-Linear, Non-Gaussian Variability With Incremental Attributes,” Proc. International Workshop on Logic and Synthesis (IWLS’06) 2006
  • A. Davoodi and A. Srivastava, “Variability Driven Buffer Insertion Considering Correlations,” Proc. International Workshop on Logic and Synthesis (IWLS’05), 2005
  • A. Davoodi and A. Srivastava, “Efficient Stochastic Pruning for Variability-Driven Dual-Vth Leakage Optimization,” Proc. International Workshop on Logic and Synthesis (IWLS’05), 2005
  • V. Khandelwal and A. Srivastava, “A General Framework for Accurate Statistical Timing Analysis Considering Correlations,” Proc. International Workshop on Logic and Synthesis (IWLS’05) 2005
  • V. Khandelwal and A. Srivastava, “On Placement and Sizing of Sleep Transistors in Leakage Critical Circuits,” Proc. International Workshop on Logic Synthesis (IWLS’04) 2004
  • A. Davoodi and A. Srivastava, “Simultaneous Floorplanning and Binding: A Probabilistic Approach,” Proc. International Workshop on Logic and Synthesis (IWLS’04) 2004
  • A. Srivastava, J. Sobaje, M. Potkonjak and M. Sarrafzadeh, “Optimal Node Scheduling for Effective Energy Usage in Sensor Networks,” Proc. IEEE Workshop on Integrated Management of Power Aware Communications, Computing and Networking 2002
  • A. Srivastava, C. Chen and M. Sarrafzadeh, “Exact Algorithm for Modifying Buffer Trees using Buffer Duplication in a Delay Optimization Perspective,” Proc. International Workshop on Logic Synthesis, (IWLS’01) 2001
  • A.Srivastava, R. Kastner and M. Sarrafzadeh, “On The Complexity of Gate Duplication,” Proc. International Workshop on Logic Synthesis (IWLS’00)2000